管理提醒： 本帖被 qq2440 从 micro2440技术交流专区 移动到本区(2013-11-18)
#include "def.h"
#include "option.h"
#include "2440addr.h"
#include "2440lib.h"
#include "nand.h"
#include "2440slib.h"
//void __RdPage512(U8 *bufPt);
//void __RdPage256(U8 *bufPt);
char NAND_READ(U32 src);
void NAND_WRITE(U32 src,U32 *ch);
void NAND_ERASE_BLOCK(U32 addr);
#define STATUS_READY 0x40
#define STATUS_ERROR 0x01
#define NF_CMD(cmd) {rNFCMD=(cmd);}
#define NF_ADDR(addr) {rNFADDR=(addr);}
#define NF_nFCE_L() {rNFCONT&=~(1<<1);}
#define NF_nFCE_H() {rNFCONT|=(1<<1);}
#define NF_RSTECC() {rNFCONT|=(1<<4);}
#define NF_RDDATA() (rNFDATA)
#define NF_WRDATA(data) {rNFDATA=(data);}
#define NF_WAITRB() {while(!(rNFSTAT&(1<<0)));}
#define NF_CLEAR_RB() {rNFSTAT|=(1<<2);}
//#define NF_DETECT_RB() {while(!(rNFSTAT&(1<<2)));}
#define NF_DETECT_RB() {while(!(rNFSTAT&(1<<2)));}//程序死在这里
#define NF_MECC_UnLock() {rNFSTAT&=~(1<<5);}
#define NF_MECC_Lock() {rNFSTAT|=(1<<5);}
#define pNFCONF rNFCONF
#define pNFCMD rNFCMD
#define pNFADDR rNFADDR
#define pNFDATA rNFDATA
#define pNFSTAT rNFSTAT
#define pNFECC rNFMECC0
#define NF_CE_L() NF_nFCE_L() //{rNFCONT&=~(1<<1);}
#define NF_CE_H() NF_nFCE_H() //{rNFCONT|=(1<<1);}
#define NF_DATA_R() rNFDATA
#define NF_ECC0() rNFMECC0
typedef union _ECCRegVal
{
DWORD dwECCVal;
BYTE bECCBuf[4];
}ECCRegVal;
void Main(void)/////############# Main()
{
//U8 key;
int i,j;
U32 ch[512];
ChangeMPllValue(127,2,1);//405Mhz
ChangeClockDivider(0, 12); //HCLK=FCLK=2PCLK
MMU_DisableICache(); //NANDFLASH USE HCLK
MMU_DisableDCache();
//GPB8 7 6 5 0 beep
//01 0101 0100 0000 0000
rGPBCON = 0x15401;
rGPBDAT=(0x0<<5);//led all on
Port_Init();
Uart_Init(0,115200);
Uart_Select(0);
Uart_Printf("\n");
Uart_Printf(" @@ the main is running @@\n");
NF_Init();
NF_Reset();
NF_ReadID();
NAND_ERASE_BLOCK(100<<9);//page 100
for(i=0;i<10000;i++);
for(i=0,j=0;i<512;i++,j+=4)
{
//ch=(j+3)<<24;
//ch|=(j+2)<<16;
//ch|=(j+1)<<8;
ch|=i;
}
NAND_WRITE((100<<9),ch);
for(i=0;i<512;i++)
{
Uart_Printf("[ADD %d ]=%d ",(i+(100<<9)),NAND_READ(i+(100<<9)));
if((i+1)%3==0)
Uart_Printf("\n");
}
}
void NF_Reset()
{
NF_CE_L();
NF_CLEAR_RB();
NF_CMD(CMD_RESET);
NF_CE_H();
//Uart_Printf(" NF_Reset FINISHED\n");
}
void NF_Init(void)
{
rNFCONF=(0<<12)|(6<<8)|(0<<4)|(0<<0);
rNFCONT=(0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(0<<6)|(0<<5)|(1<<4)|(1<<1)|(1<<0);
rNFSTAT=0x0;
//Uart_Printf(" NF_Init FINISHED\n");
}
//#ifdef NF_READID
void NF_ReadID()
{
char wData1,wData2;
//Uart_Printf(" NF_ReadID 1 start\n");
NF_CE_L();
NF_CLEAR_RB();
NF_CMD(CMD_READID);
NF_ADDR(0x00);
NF_WAITRB() ;
//Uart_Printf(" NF_ReadID 3 start\n");
wData1=(BYTE)NF_DATA_R();
wData2=(BYTE)NF_DATA_R();
NF_CE_H();
Uart_SendString("Nand Maker code: ");
Uart_Printf("0x%x\n",wData1);
Uart_SendString("Nand Device Code: ");
Uart_Printf("0x%x\n\n",wData2);
}
//#endif
char NAND_READ(U32 src)
{
char aa;
U32 column_addr,page_addr;
column_addr=src%512;
page_addr=(src>>9);
// Chip enable
NF_CE_L();
NF_CLEAR_RB();
NF_CMD(CMD_READ);
NF_ADDR(column_addr);
NF_ADDR((page_addr)&0xff);
NF_ADDR((page_addr>>8)&0xff);
NF_ADDR((page_addr>>16)&0xff);
NF_WAITRB() ;
aa= NF_DATA_R();
NF_CE_H();
return aa;
}
void NAND_WRITE(U32 src,U32 *ch)
{
U32 t,i,column_addr,page_addr;
column_addr=src%512;
page_addr=(src>>9);
// Chip enable
NF_CE_L();
NF_CLEAR_RB();
NF_CMD(0x80);
//for(i=0;i<10;i++);
NF_ADDR(column_addr);
NF_ADDR((page_addr)&0xff);
NF_ADDR((page_addr>>8)&0xff);
NF_ADDR((page_addr>>16)&0xff);
//for(t=0;t<10;t++);
for(i=column_addr;i<512;i++)
{
(BYTE)NF_DATA_R()=*ch++;//这样写入的是字节
NF_//DATA_R()=*ch++;////这样写入了一个字[31:0]，不是字节、即使ch为char星，也是字 //for(t=0;t<10;t++);
}//NFDATA *****[31:0]**** NAND flash read/program data value for I/O
//Note: Refer to data register configuration in Page 6-5.
//
//
//NF_WAITRB();
NF_CMD(0x10);
NF_WAITRB();
//for(t=0;t<1000;t++);
NF_CE_H();
}
void NAND_ERASE_BLOCK(U32 addr)
{
U32 page_addr;
page_addr=(addr>>9);
// Chip enable
NF_CE_L();
NF_CLEAR_RB();
NF_CMD(0x60);
NF_ADDR((page_addr)&0xff);
NF_ADDR((page_addr>>8)&0xff);
NF_ADDR((page_addr>>16)&0xff);
NF_WAITRB() ;
NF_CMD(0xd0);
//for(i=0;i<100;i++);
NF_CE_H();
}
