调试Tiny6410的Uart1出现发送卡死现象？
发送缓冲器总是发送不出去，然后就卡死了...找了下时钟的原因但是都很正常...郁闷中！
我用printk进行调试的，测试应用程序还没写...程序也不完整望大虾见谅！
QQ:252501870
附上代码：
Tiny6410_Uart1.rar (3 K) 下载次数:4 #include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/poll.h>
#include <linux/wait.h>
#include <asm/io.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <linux/irq.h>
#include <linux/miscdevice.h>
#include <linux/platform_device.h>
#include <mach/hardware.h>
#include <linux/errno.h>
#include <mach/regs-gpio.h>
#include <linux/delay.h>
MODULE_LICENSE("GPL");
#define ULCON0 (0x7F005000)
#define ULCON1 (0x7F005400)
#define ULCON2 (0x7F005800)
#define ULCON3 (0x7F005C00)
#define UCON0 (0x7F005004)
#define UCON1 (0x7F005404)
#define UCON2 (0x7F005804)
#define UCON3 (0x7F005C04)
#define UFCON0 (0x7F005008)
#define UFCON1 (0x7F005408)
#define UFCON2 (0x7F005808)
#define UFCON3 (0x7F005C08)
#define UMCON0 (0x7F00500C)
#define UMCON1 (0x7F00540C)
#define UTRSTAT0 (0x7F005010)
#define UTRSTAT1 (0x7F005410)
#define UTRSTAT2 (0x7F005810)
#define UTRSTAT3 (0x7F005C10)
#define UERSTAT0 (0x7F005014)
#define UERSTAT1 (0x7F005414)
#define UERSTAT2 (0x7F005814)
#define UERSTAT3 (0x7F005C14)
#define UFSTAT0 (0x7F005018)
#define UFSTAT1 (0x7F005418)
#define UFSTAT2 (0x7F005818)
#define UFSTAT3 (0x7F005C18)
#define UMSTAT0 (0x7F00501C)
#define UMSTAT1 (0x7F00541C)
#define UTXH0 (0x7F005020)
#define UTXH1 (0x7F005420)
#define UTXH2 (0x7F005820)
#define UTXH3 (0x7F005C20)
#define URXH0 (0x7F005024)
#define URXH1 (0x7F005424)
#define URXH2 (0x7F005824)
#define URXH3 (0x7F005C24)
#define UBRDIV0 (0x7F005028)
#define UBRDIV1 (0x7F005428)
#define UBRDIV2 (0x7F005828)
#define UBRDIV3 (0x7F005C28)
#define UDIVSLOT0 (0x7F00502C)
#define UDIVSLOT1 (0x7F00542C)
#define UDIVSLOT2 (0x7F00582C)
#define UDIVSLOT3 (0x7F005C2C)
#define UINTP0 (0x7F005030)
#define UINTP1 (0x7F005430)
#define UINTP2 (0x7F005830)
#define UINTP3 (0x7F005C30)
#define UINTSP0 (0x7F005034)
#define UINTSP1 (0x7F005434)
#define UINTSP2 (0x7F005834)
#define UINTSP3 (0x7F005C34)
#define UINTM0 (0x7F005038)
#define UINTM1 (0x7F005438)
#define UINTM2 (0x7F005838)
#define UINTM3 (0x7F005C38)
#define GPACON (0x7F008000)
#define GPADAT (0x7F008004)
#define GPAPUD (0x7F008008)
#define GPACONSLP (0x7F00800C)
#define GPAPUDSLP (0x7F008010)
#define CLK_SRC (0x7E00F01C)
#define CLK_DIV1 (0x7E00F024)
#define PCLK_GATE (0x7E00F034)
#define SCLK_GATE (0x7E00F038)
void *R_GPACON,*R_GPADAT,*R_GPAPUD,*R_GPACONSLP,*R_GPAPUDSLP;
void *R_ULCON1,*R_UCON1,*R_UFCON1,*R_UMCON1,*R_UTRSTAT1,*R_UERSTAT1,*R_UFSTAT1,*R_UMSTAT1;
void *R_UTXH1,*R_URXH1,*R_UBRDIV1,*R_UDIVSLOT1,*R_UINTP1,*R_UINTSP1,*R_UINTM1;
void *R_CLK_SRC,*R_CLK_DIV1,*R_PCLK_GATE,*R_SCLK_GATE;
static irqreturn_t Uart1_ReceiveByte(int irq,void *dev_id);
static void Uart1_Unmap(void);
static void Uart1_Remap(void);
static void Uart1_SendByte(unsigned char dat);
static void Uart1_ReceiveBytePoll();
static int err=0;
static void Uart1_Remap(void)
{
if(!request_mem_region(0x7f005400,0x100,"Yaoxing_Uart1"))
{
printk("Yaoxing_Uart1 request_mem_region -EBUSY\n");
}
else
{
printk("Yaoxing_Uart1 request_mem_region PASS\n");
}
R_SCLK_GATE=ioremap(SCLK_GATE,4);
R_CLK_SRC=ioremap(CLK_SRC,4);
R_CLK_DIV1=ioremap(CLK_DIV1,4);
R_PCLK_GATE=ioremap(PCLK_GATE,4);
R_GPACON=ioremap(GPACON,4);
R_GPADAT=ioremap(GPADAT,4);
R_GPAPUD=ioremap(GPAPUD,4);
R_GPACONSLP=ioremap(GPACONSLP,4);
R_GPAPUDSLP=ioremap(GPAPUDSLP,4);
R_ULCON1=ioremap(ULCON1,4);
R_UCON1=ioremap(UCON1,4);
R_UFCON1=ioremap(UFCON1,4);
R_UMCON1=ioremap(UMCON1,4);
R_UTRSTAT1=ioremap(UTRSTAT1,4);
R_UERSTAT1=ioremap(UERSTAT1,4);
R_UFSTAT1=ioremap(UFSTAT1,4);
R_UMSTAT1=ioremap(UMSTAT1,4);
R_UTXH1=ioremap(UTXH1,4);
R_URXH1=ioremap(URXH1,4);
R_UBRDIV1=ioremap(UBRDIV1,4);
R_UDIVSLOT1=ioremap(UDIVSLOT1,4);
R_UINTP1=ioremap(UINTP1,4);
R_UINTSP1=ioremap(UINTSP1,4);
R_UINTM1=ioremap(UINTM1,4);
}
static void Uart1_Unmap(void)
{
iounmap(R_SCLK_GATE);
iounmap(R_CLK_SRC);
iounmap(R_CLK_DIV1);
iounmap(R_PCLK_GATE);
iounmap(R_GPACON);
iounmap(R_GPADAT);
iounmap(R_GPAPUD);
iounmap(R_GPACONSLP);
iounmap(R_GPAPUDSLP);
iounmap(R_ULCON1);
iounmap(R_UCON1);
iounmap(R_UFCON1);
iounmap(R_UMCON1);
iounmap(R_UTRSTAT1);
iounmap(R_UERSTAT1);
iounmap(R_UFSTAT1);
iounmap(R_UMSTAT1);
iounmap(R_UTXH1);
iounmap(R_URXH1);
iounmap(R_UBRDIV1);
iounmap(R_UDIVSLOT1);
iounmap(R_UINTP1);
iounmap(R_UINTSP1);
iounmap(R_UINTM1);
release_mem_region(0x7f005400,0x100);
}
static irqreturn_t Uart1_ReceiveByte(int irq,void *dev_id)
{
unsigned char tmp8;
unsigned int tmp16;
unsigned long tmp32;
printk("Uart1 is asserted!\n");
tmp32=ioread32(R_UTRSTAT1);
tmp16=0xf;
while(tmp16--)
{
if((tmp32&0x1)==0x1)
{
tmp8=ioread8(R_URXH1);
printk("Uart1_ReceiveByte R_URXH1 data is received!\n");
break;
}
else
{
tmp32=ioread32(R_UTRSTAT1);
printk("Uart1_ReceiveByte R_URXH1 wait for data!\n");
msleep(1);
}
}
printk("Uart1 = %d OK\n",tmp8);
return IRQ_RETVAL(IRQ_HANDLED);
}
static void Uart1_ReceiveBytePoll()
{
unsigned char tmp8;
unsigned int tmp16;
unsigned long tmp32;
printk("Uart1_ReceiveBytePoll is asserted!\n");
tmp32=ioread32(R_UTRSTAT1);
tmp16=0xf;
while(tmp16--)
{
if((tmp32&0x1)==0x1)
{
tmp8=ioread8(R_URXH1);
printk("Uart1_ReceiveByte R_URXH1 data is received!\n");
break;
}
else
{
tmp32=ioread32(R_UTRSTAT1);
printk("Uart1_ReceiveByte R_URXH1 wait for data!\n");
msleep(1);
}
}
printk("Uart1 = %d OK\n",tmp8);
}
static int __init Uart1_Init(void)
{
unsigned char tmp8;
unsigned int tmp16;
unsigned long tmp32;
printk("Uart1_Init Entred!\n");
Uart1_Remap();
printk("Uart1_Remap OK!\n");
printk("Uart1_Init Start Setup Registers!\n");
/*R_CLK_SRC,R_CLK_DIV1,R_PCLK_GATE,R_SCLK_GATE*/
tmp32=ioread32(R_SCLK_GATE);
printk("R_SCLK_GATE=%d\n",R_SCLK_GATE);
tmp32|=(1<<5);
iowrite32(tmp32,R_SCLK_GATE);
tmp32=ioread32(R_PCLK_GATE);
printk("R_PCLK_GATE=%d\n",R_PCLK_GATE);
tmp32|=(1<<2);
iowrite32(tmp32,R_PCLK_GATE);
tmp32=ioread32(R_CLK_DIV1);
printk("R_CLK_DIV1=%d\n",R_CLK_DIV1);
if(((tmp32>>16)&0xf))
{
printk("R_CLK_DIV1=%d\n");
}
else
{
printk("Error:R_CLK_DIV1=0\n");
}
tmp32=ioread32(R_CLK_SRC);
printk("R_CLK_SRC=%d\n",R_CLK_SRC);
if((tmp32>>13)&0x01)
{
printk("R_CLK_SRC=1\n");
}
else
{
printk("Error:R_CLK_SRC=0\n");
}
tmp32=ioread32(R_GPACON);
tmp32&=~(0xff<<16);
tmp32|=(0x22<<16);
iowrite32(tmp32,R_GPACON);
tmp32=ioread32(R_GPAPUD);
tmp32=0x00;
iowrite32(tmp32,R_GPAPUD);
tmp32=ioread32(R_ULCON1);
// printk("R_ULCON1=%d\n",tmp32);
tmp32|=((0<<6)|(0<<3)|(0<<2)|(0x3<<0));
iowrite32(tmp32,R_ULCON1);
tmp32=ioread32(R_UCON1);
tmp32|=((0<<10)|(1<<9)|(1<<8)|(0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0));
iowrite32(tmp32,R_UCON1);
tmp32=ioread32(R_UFCON1);
tmp32|=((0<<6)|(0<<4)|(0<<2)|(0<<1)|(0<<0));
iowrite32(tmp32,R_UFCON1);
tmp32=ioread32(R_UMCON1);
tmp32|=((0<<5)|(0<<4)|(0<<0));
iowrite32(tmp32,R_UMCON1);
tmp32=34;
iowrite32(tmp32,R_UBRDIV1);
tmp32=ioread32(R_UBRDIV1);
printk("R_UBRDIV1 35=%d\n",tmp32);
tmp32=0xDDDD;
iowrite32(tmp32,R_UDIVSLOT1);
tmp32=ioread32(R_UDIVSLOT1);
printk("R_UDIVSLOT1 128=%d\n",tmp32);
printk("Uart1_Init Setup Registers OK!\n");
printk("Uart1_Init Setup IRQ!\n");
err=request_irq(IRQ_S3CUART_RX1,Uart1_ReceiveByte,0,"Yaoxing_Uart1",0);/*IRQ_S3CUART_RX1 IRQF_DISABLED IRQ_TYPE_EDGE_FALLING*/
printk("Uart1_Init Setup IRQ OK!\n");
if(err==-EBUSY)
{
printk("Error=-EBUSY\n\n",err);
while(1);
}
else if(err==-EINVAL)
{
printk("Error=-INVAL\n\n",err);
while(1);
}
printk("Uart1_Init OK!\n");
Uart1_SendByte(0xaa);
Uart1_ReceiveBytePoll();
//Uart1_SendByte(0xaa);
tmp32=ioread32(R_UERSTAT1);
printk("UERSTAT1=%d\n",R_UERSTAT1);
return 0;
}
static void Uart1_SendByte(unsigned char dat)
{
unsigned char tmp8;
unsigned int tmp16;
unsigned long tmp32;
printk("Uart1_SendByte entred!\n");
while(!(tmp32&0x2))
{
tmp32=ioread32(R_UTRSTAT1);
mdelay(1);
}
iowrite8(dat,R_UTXH1);
printk("Uart1_SendByte OK!\n");
}
static void __exit Uart1_Exit(void)
{
//disable_irq(IRQ_S3CUART_RX1);
free_irq(IRQ_S3CUART_RX1,NULL);
Uart1_Unmap();
printk("Uart1_Exit OK!\n");
}
module_init(Uart1_Init);
module_exit(Uart1_Exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Yaoxing");
MODULE_DESCRIPTION("Yaoxing's E-mail:comet0202@163.com");
